Along with continual progress of the semiconductor fabrication technology, the corresponding electronic packaging technology is also enhanced gradually. The higher sophistication of integrated circuits (ICs), the smaller tolerance of the packaging process. Therefore, how to develop a packaging technique having a better reliability and a higher assembly yield is a problem much emphasized in this industry.
As shown in FIG. 1, a package product not yet processed by the package singular step comprises a substrate 10 having a plurality of substrate units 11. Each substrate unit has a package unit 12 and a plurality of slots 14 are formed at the periphery of each substrate unit 11. The slots 14 can be used as borders of the substrate units 11 when performing the package singular process. Before performing the package singular process, a plurality of connection portions 16 are arranged at corners of each substrate unit 11 to connect each substrate unit 11 and the substrate 10 together. However, when performing the package singular process, the punch moves along the slots 14 for singulation and the singular pressure extends from the connection portions 16 toward two sides. Since the corners of the package unit 12 are nearest to the connection portions 16, the stress per unit area is the highest at the corners of each package unit 12. This stress will easily cause breakage of trace in the package substrate 10 or peeling of molding compound 18 from the package substrate 10, as shown in FIG. 2. Therefore, the yield of the package product will be decreased.
Accordingly, the present invention aims to propose a package substrate structure capable of reducing punch stress for effectively solving the problems in the prior art.